Course Schedule - Fall Semester 2021

     

Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).
Additional information available here.

ELEC 522 001 (CRN: 13700)

ADV VLSI DESIGN

Long Title: ADVANCED VLSI DESIGN
Department: Electrical & Computer Eng.
Instructor: Cavallaro, Joseph
Meeting: 1:00PM - 2:15PM TR (23-AUG-2021 - 3-DEC-2021) 
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture
Language of Instruction: Taught in English
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
Course Materials: Rice Campus Store
 
Restrictions:
Must be enrolled in one of the following Level(s):
Graduate
Section Max Enrollment: 25
Section Enrolled: 16
Enrollment data as of: 6-DEC-2024 11:21PM
 
Additional Fees: None
 
Final Exam: GR Course-Dept Schedules Exam
 
Description: Design and analysis of algorithm-specific VLSI processor architectures. Topics include the implementation of pipelined and systolic processor arrays. Techniques for mapping numerical algorithms onto custom processor arrays. Course includes design project using high-level VLSI synthesis tools.