Course Schedule and Catalog
Course Schedule - Fall Semester 2021
Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).Additional information available here.
Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).Additional information available here.
ELEC 543 001 (CRN: 12285)
ADV H-S SYSTEM DESIGN
Long Title: ADVANCED HIGH-SPEED SYSTEM DESIGN
Department: Electrical & Computer Eng.
Instructor: Tran, Thanh
Meeting: 4:00PM - 5:15PM MW (23-AUG-2021 - 3-DEC-2021)
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture
Language of Instruction: Taught in English
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
Course Materials: Rice Campus Store
Restrictions:
Must be enrolled in one of the following Level(s):
Graduate
Section Max Enrollment: 29
Section Enrolled: 1
Total Cross-list Max Enrollment: 29
Total Cross-list Enrolled: 4
Enrollment data as of: 13-OCT-2024 12:15AM
Final Exam: Scheduled Final Exam-OTR Room
Final Exam Time:
10-DEC-2021
2:00PM - 5:00PM F
Description: This course covers practical aspects of high-speed system design, highlights system design and simulation challenges, and demonstrates common pitfalls and how to prevent them. In this course, students will learn how to design, do gigahertz speed PCB layout, simulate (spice and Hyperlynx), and apply good design practices to minimize both component and system noise and to ensure system design success. Additional coursework required beyond the undergraduate course requirements. Cross-list: ELEC 434. Recommended Prerequisite(s): Knowledge of mixed analog/digital circuits, active filters and transmission line theories. Mutually Exclusive: Cannot register for ELEC 543 if student has credit for ELEC 434.