Course Schedule - Fall Semester 2018

     

ELEC 326 001 (CRN: 10043)

DIGITAL LOGIC DESIGN

Long Title: DIGITAL LOGIC DESIGN
Department: Electrical & Computer Eng.
Instructor: Varman, Peter J.
Meeting: 10:50AM - 12:05PM TR DCH 1070 (20-AUG-2018 - 30-NOV-2018) 
Session: Full Term
Grade Mode: Standard Letter
Course Type: Lecture/Laboratory
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
Course Materials: Rice Campus Store
 
Restrictions:
Must be enrolled in one of the following Level(s):
Undergraduate Professional
Visiting Undergraduate
Undergraduate
Prerequisites: ELEC 220
Section Max Enrollment: 73
Section Enrolled: 34
Total Cross-list Max Enrollment: 73
Total Cross-list Enrolled: 36
Enrollment data as of: 29-NOV-2020 11:30AM
 
Fees: None
 
Final Exam: Scheduled Final Exam-OTR Room
Final Exam Time:
6-DEC-2018  
9:00AM - 12:00PM R DCH 1070
 
Description: Study of gates, flip-flops, combinational and sequential switching circuits, registers, logical and arithmetic operations, introduction to the Verilog hardware description language. Cross-list: COMP 326.