Course Schedule - Fall Semester 2017


Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).
Additional information available here.

ELEC 554 002 (CRN: 13961)


Department: Electrical & Computer Eng.
Instructor: Simar, Ray
8:00AM - 9:15AM TR (21-AUG-2017 - 1-DEC-2017) 
6:30PM - 7:45PM W (21-AUG-2017 - 1-DEC-2017) 
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture/Laboratory
Language of Instruction: Taught in English
Method of Instruction: Face to Face
Credit Hours: 4
Course Syllabus:
Course Materials: Rice Campus Store
Must be enrolled in one of the following Level(s):
Section Max Enrollment: 16
Section Enrolled: 10
Total Cross-list Max Enrollment: 140
Total Cross-list Enrolled: 130
Enrollment data as of: 19-JUL-2024 5:03AM
Additional Fees: None
Final Exam: Scheduled Final Exam-OTR Room
Final Exam Times:
7:00PM - 10:00PM T
7:00PM - 10:00PM T
Description: Evolution of key architecture concepts found in advanced uniprocessor systems. Fundamental and advanced pipelining techniques and associated issues for improving processor performance. Illustrated with RISC processors such as the ARM processor. Examine several metrics for processor performance, such as Amdahl’s law. Key concepts of data and program memory systems found in modern systems with memory hierarchies and cashes. Perform experiments in cache performance analysis. Influence of technology trends, such as Moore’s law, on processor implementation Approaches for exploiting instruction level parallelism, such as VLIW. Introduction to parallel and multicore architectures. Introduction to processor architectures targeted for imbedded applications.Additional coursework required beyond the undergraduate course requirements. Cross-list: ELEC 425, COMP 425, ELEC 425, COMP 425, ELEC 554, COMP 554, COMP 554, ELEC 425, COMP 425, ELEC 554, COMP 554. Mutually Exclusive: Cannot register for ELEC 554 if student has credit for ELEC 425.