Course Schedule - Fall Semester 2015

     

Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).
Additional information available here.

ELEC 555 001 (CRN: 13963)

ADV DIGITAL DESIGN & IMPLEMENT

Long Title: ADVANCED DIGITAL HARDWARE DESIGN, IMPLEMENTATION, AND OPTIMIZATION
Department: Electrical & Computer Eng.
Instructor: Koushanfar, Farinaz
Meeting: 9:25AM - 10:40AM TR (24-AUG-2015 - 4-DEC-2015) 
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture/Laboratory
Language of Instruction: Taught in English
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
 
Restrictions:
Must be enrolled in one of the following Level(s):
Graduate
Section Max Enrollment: 24
Section Enrolled: 12
Total Cross-list Max Enrollment: 24
Total Cross-list Enrolled: 17
Enrollment data as of: 20-APR-2024 4:50AM
 
Additional Fees: None
 
Final Exam: GR Course-Dept Schedules Exam
 
Description: This graduate level course will investigate design and implementation of modern digital signal processing, machine learning, and security algorithms in hardware (including FPGAs and ASICs). Along with learning the principals of design, students will acquire hands-on experience in hardware implementation and the use of the hardware in modern applications including but not limited to mobile phones, biomedical devices, and smart cards. Emphasis is on digital processors, design implementation on FPGA/ASIC fabrics and testing real systems on board, architectures, control, functional units, and circuit topologies for increased performance and reduced circuit size and power dissipation. Additional coursework required beyond the undergraduate course requirements. Cross-list: ELEC 427. Mutually Exclusive: Cannot register for ELEC 555 if student has credit for ELEC 427. Repeatable for Credit.