Course Schedule - Fall Semester 2005

     

Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).
Additional information available here.

ELEC 326 001 (CRN: 10684)

DIGITAL LOGIC DESIGN

Long Title: DIGITAL LOGIC DESIGN
Department: Electrical & Computer Eng.
Instructor: Mohanram, Kartik
Meeting: 10:50AM - 12:05PM TR (22-AUG-2005 - 2-DEC-2005) 
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture/Laboratory
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
 
Section Max Enrollment: 73
Section Enrolled: 31
Enrollment data as of: 10-MAY-2024 9:52AM
 
Additional Fees: None
 
Final Exam: Final Exam Unknown
 
Description: Gates, flip-flops, combinational and sequential switching circuits, registers, logical and arithmetic operations, introduction to the Verilog hardware description language.