Course Schedule and Catalog
Course Schedule - Fall Semester 2013
Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).Additional information available here.
Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).Additional information available here.
ELEC 522 001 (CRN: 10383)
ADV VLSI DESIGN
Long Title: ADVANCED VLSI DESIGN
Department: Electrical & Computer Eng.
Instructor: Cavallaro, Joseph
Meeting: 1:00PM - 2:15PM TR (26-AUG-2013 - 6-DEC-2013)
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
Section Max Enrollment: 25
Section Enrolled: 19
Enrollment data as of: 19-APR-2024 4:05AM
Final Exam: No Final Exam
Description: Design and analysis of algorithm-specific VLSI processor architectures. Topics include the implementation of pipelined and systolic processor arrays. Techniques for mapping numerical algorithms onto custom processor arrays. Course includes design project using high-level VLSI synthesis tools.