Course Schedule and Catalog
Course Schedule - Spring Semester 2012
Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).Additional information available here.
Meeting location information can now be found on student schedules in ESTHER (for students) or on the Course Roster in ESTHER (for faculty and instructors).Additional information available here.
ELEC 517 001 (CRN: 27224)
ARCHITECTING ALGORITHMS
Long Title: ARCHITECTING MODERN LEARNING ALGORITHMS
Department: Electrical & Computer Eng.
Instructor: Koushanfar, Farinaz
Meeting: 10:50AM - 12:05PM TR (9-JAN-2012 - 20-APR-2012)
Part of Term: Full Term
Grade Mode: Standard Letter
Course Type: Lecture
Method of Instruction: Face to Face
Credit Hours: 3
Course Syllabus:
Section Max Enrollment: 25
Section Enrolled: 7
Enrollment data as of: 19-APR-2024 7:26PM
Description: This course focuses on architecture development and hardware realization of contemporary learning algorithms. A multitude of new learning algorithms have been recently developed, in particular in the sparse approximation domain. Thus far, the basic functionality of the new algorithms have been mostly verified and evaluated in simulation packages such as Matlab and software implementation. Application-specific customization and hardware implementation would bring orders-of-magnitude energy-performance efficiency improvement to important learning methods. The course will include FPGA reconfigurable fabric architecture and design flow, high analysis of multimedia processing VLSI architectures, and prototyping on FPGA. The focus of the project will be implementation of the state-of-the-art signal processing and learning algorithms on FPGA. Recommended Prerequisite(s): A digital logic design course and hands-on experience such as ELEC 326/ELEC 327, Background in VLSI, computer architecture, and signal processing/learning is also very useful, but the course is designed to be self-contained.